Taiwan Semiconductor Manufacturing Co (TSMC) has announced plans to build the world's fabrication facility capable of support microprocessor nodes on silicon as fine as three nanometres.
While the company has been talking about building the 3nm fab for a while, recent rumours seemed to give the impression that the building would be in the US, after President Donald Trump said that he wanted to see high-tech manufacturing in the country.
However, TSMC has made it clear, according to Digitimes, that it wishes to stay in Taiwan at the Tainan Science Park to "fully leverage the company's exisiting cluster advantage" and to enjoy the benefits of a "comprehensive supply chain".
The company already operates a 5nm fab in the same location, so it's not an illogical leap, though TSMC hasn't started producing 5nm chips yet, its website claims that these are "scheduled to start risk production in the second quarter of 2019".
IBM, meanwhile, claims to have successfully created 5nm silicon chips already, albeit in the lab. This was revealed back in June 2017, when the company said that it had used silicon nanosheets in a "Gate All Around" field-effect transistor (GAAFET) setup.
TSMC is continuing to back the 7nm FinFET (Fin Field Effect Transistor) process for 5nm - essentially a "3D" non-planar transistor that, literally, resembles a fin, hence the name.
However, despite the fact that the GAAFET approach could feasibly support the manufacture of 3nm chips, IBM has - probably quite wisely - not elaborated as such. TSMC's announcements, meanwhile, seem to give the impression that it may get to sub-5nm manufacturing first.
For a while, it seemed that 5nm chip manufacture may actually break Moore's Law, but with IBM already pioneering it, there seems no reason that, given the right production environment, TSMC couldn't potentially pip Big Blue to it.
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