AMD is tweaking the design of its upcoming Carrizo family of accelerated processing units (APUs) to make them more compact and efficient. This will boost performance, save power and deliver double-digit increases in performance and battery life, according to the firm.
The chipmaker is presenting papers at the International Solid-State Circuits Conference in San Francisco that detail how it has tweaked the Carrizo design using tricks such as optimised component libraries to pack the circuitry into a smaller area, and new techniques such as voltage adaptive operation to enable reliable operation while cutting power consumption.
Carrizo chips are expected to launch in the second quarter of this year, and are a new family of APUs that combine CPU and GPU cores on the same chip. In this case, the cores are a new design codenamed Excavator, while the GPU is based on the next-generation AMD Radeon Graphics Core Next architecture.
The Excavator core is the fourth generation in the Bulldozer core line, and AMD has increased its instruction per clock performance by about five percent by doubling the L0 data cache for both integer processor units in the Excavator core, according to AMD corporate fellow Sam Naffziger.
However, the firm has managed to add these capabilities while using 23 percent less silicon area in the same 28nm production process. It achieved this by copying high-density library techniques from its GPU design team, Naffziger said.
"We took some of the biggest blocks in the CPU, which were formerly hand generated as part of a high-performance library. We used the GPU implementation methods and we found we could squeeze a significant amount of area out of those blocks and save about the same amount of power," he explained.
Conversely, AMD has also applied some of the CPU tuning techniques to the GPU in order to improve that implementation. This has resulted in optimisation for a lower power operating point, enabling the GPU to run at a 10 percent higher frequency for the same power level, or up to 20 percent lower power at the same frequency.
"That's enabled us to deploy the full set of eight graphics compute units even when running in the low-power envelopes, and deliver a lot more performance per watt," Naffziger said.
The previous Kaveri generation meant that some of the cores had to be powered down when operating below 20W.
Another technique AMD is introducing in the Carrizo design is voltage adaptive operation, which watches for voltage "droops" when running at high frequency, and temporarily drops the operating frequency to compensate.
"The current changes from the gigahertz operating circuits induce voltage droops and glitches in the power delivery network. We just can't deliver a perfect voltage to the circuits," Naffziger explained.
"Traditional approaches have been just to raise the voltage, which means that about 20 percent of the power is wasted protecting from these droop effects. We didn't want to pay that penalty in our design."
Another feature is Adaptive Voltage and Frequency Scaling, which uses sensors around the chip to measure the performance against its frequency and temperature.
These provide feedback to the on-chip power manager to optimise how fast the chip can run without overheating or drawing too much current.
AMD has also optimised the power-saving states, enabling a Carrizo chip to enter and exit the very low power S0i3 state in just 500ms, according to Naffziger.
This state, which is comparable to the old S3 'standby' mode whereby almost everything is powered down and the clocks shut off, consumes just 50mW of power.
"All these things add up to a very significant boost in performance per watt, and it aligns well with the aggressive goal we set last year of achieving a 25X improvement in typical efficiency for our laptop platforms by 2020," Naffziger claimed.
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