Intel has posted further information about the Poulson micro-architecture behind its upcoming line of Itanium server processors.
The Poulson chips combine an eight-core design with improved throughput and greater efficiency, the firm said. The chips use a 32nm architecture and are socket compatible with the previous 9300 line. No official release date has been given.
Poulson systems sport 3.1 billion transistors per chip and carry 54Mb of onboard memory. Maximum execution width has been doubled from six to 12, and bandwidth speeds have been boosted by 33 per cent.
Despite using a redesigned architecture, the Poulson line will remain compatible with systems based on the Itanium 9300 series. Along with socket compatibility, Poulson allows for improved speeds without requiring developers to recompile existing code.
Rory McInerney, microprocessor development group director at Intel, told reporters that Poulson is the most significant redesign of the Itanium platform to date.
"We believe that we will be able to continue the momentum in Itanium through this decade," he said.
Itanium is designed for use in mission-critical server applications, but has struggled to maintain vendor support in much of the market.
Intel pitches Itanium as a platform for mainframe and Unix systems, while Xeon servers target the Windows, Linux and Solaris sectors.
Michael McNerney, director of server planning and marketing for HP business critical systems, told V3.co.uk that customers often run Itanium and Xeon alongside one another, and that Itanium systems are frequently used to support legacy applications.
"We don't see customers saying: 'I'm an all Itanium or all Xeon shop.' We see them breaking it down by workload," he said.
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