Hitachi Cambridge Laboratory has unveiled new technology that could lead to memory chips using a single electron to store one bit of data. Current DRAM chips use about 500,000 electrons to store one bit.
The new technology, called Phase-state Low Electron(hole)-number Drive Memory (PLEDM), already shrinks the size of the memory cell so that just 1,000 electrons are needed to store one bit. The technology is expected to attain single-electron storage capabilities by 2010.
The possible implications are immense, the specifications minuscule.
The breakthrough will remove the barrier between physical size and storage capacity, said Hitachi, which added that the performance of PLEDM chips would actually increase with a reduction in size. Ultimately, this could pave the way for nano-scale chips with incredible capacity.
Hitachi told PC Week that an entire digital video disk's data could fit onto a single PLEDM chip the size of a thumbnail. PLEDMs consume very little power, which would mean that mobile phones and computers would be lighter and more economical. Non-volatile versions could be produced that would not lose their stored data when power is switched off.
However, Lynley Gwennap, editorial director of the Microprocessor Report, was sceptical of PLEDM's breakthrough claim. "These things have a way of not being so exciting by the time they leave the labs," he said. "By the time (PLEDM) is ready to go, other technologies may have caught up. However, it will potentially allow DRAM to continue scaling and evolving."
DRAM technology, the current standard for high-speed memory, suffers from the drawback that as memory cells get smaller, the signal-to-noise (S/N) ratio decreases, creating a physical limit beyond which chips can get no smaller.
The laboratory's scientists at Cambridge University decided to redesign the cell structure to get past this barrier, using two transistors where the usual DRAM chip would use a transistor and a capacitor.
The second transistor, called a PLED transistor, sits on the gate of the other, traditional MOSFET metal oxide semiconductor field effect transistor, a structure Hitachi called a world first.
Haroon Ahmed, professor of microelectronics at the university, said: "The project was transferred back to Hitachi's Device Development Centre in Japan two years ago and is the result of collaboration between Hitachi and Cambridge University stretching back 10 years.
"Although we have tested the structures and created a number of batches of (samples), it is too early for a prototype chip, and it will be five years before full production," he added.
Ashim Pal, senior analyst at the Meta Group, doubted that Hitachi could stick to that development time frame but was excited by the technology.
"It's all real, it will get to the stage where you can get a petabyte (1,000,000Gb) into a thumbnail," he said. "But (Hitachi) will have to re-architect the PC motherboard" before this will become a standard.
The main barrier to earlier commercial exploitation is the difference in architecture, which Hitachi hopes to solve by redesigning the cell and the internal layout of the chip. The cell is also being tested using different transistors to find the best combination.
Once these barriers have been overcome, the chips should roll out quickly: Hitachi said they are 10% easier to make than DRAM chips using the same manufacturing process.
Ahmed said he expects the chips to "enable miniaturisation in those areas where large memory capacity is needed" and also envisages dual-purpose hard-drive/RAM devices and instant-on computers.
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