HP Labs has published a paper in the 24 January issue of Nanotechnology which posits that the performance of computer processors can be dramatically improved with a small adaptation to current designs.
Companies like Intel have concentrated on shrinking the size of transistors in the processor to allow more to be built into each new chip. But HP's method does not require smaller transistors, merely a reworking of the inter-connections.
In current chip design the transistors are wired together to allow communication, which means that much of the chip is built up of interconnecting cables.
HP has laid a grid on top of the transistors and eliminated the connections wires, which allows for more powerful chips and dramatically reduces power consumption.
"As conventional chip electronics continue to shrink, Moore's Law is on a collision course with the laws of physics," said Stan Williams, an HP Senior Fellow and director of quantum science research at HP Labs.
"Excessive heating and defective device operation arise at the nanoscale. What we have been able to do is combine conventional CMOS technology with nanoscale switching devices in a hybrid circuit to increase effective transistor density, reduce power dissipation, and dramatically improve tolerance to defective devices."
The paper states that HP could have a functioning chip using the new system by the end of 2007, and could have a chip using standard-sized transistors by 2010 that outperforms existing technology by a factor of three.
One downside to the technique is that the thinnest of the new nanowire interconnects makes them vulnerable to breakage during production.
However, the paper suggests that even a 25 per cent failure rate would not slow the processor significantly.
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