Intel has boosted its XScale plans by launching a new line of network processors based on the architecture.
Three different network chips have been developed for its internet exchange architecture line and are based on XScale, which is a new and improved version of Intel's StrongARM Risc processor line. The chips are aimed at telco equipment manufacturers.
The IXP425 network processor is designed for applications such as customer premises equipment and remote DSL Access Multiplexers. It supports applications across a wide range of transport media, including common versions of DSL, internet cable, wireless and Ethernet.
The IXP2800 is aimed at applications in the infrastructure core, such as ultra high-speed switches and routers, while the IXP2400 targets switches at the network edge.
The fully programmable IXP2400 and IXP2800 chips operate at 2.5Gbps (OC-48) and 10Gbps (OC-192) respectively, and use a technique which Intel calls Hyper Task Chaining.
This enables the processors to perform a number of operations on a data packet at the same time by dealing out tasks to numerous processing engines.
Steve Price, general manager at Intel's integrated access business unit, said: "The whole idea behind the processing engine is to offload any kind of data manipulation or data movement from the XScale core.
"There is 'fast path' technology pipelining between these products that really limits the number of interruptions to the XScale core."
The new processors, which will compete against similar products from Broadcom, IBM, Motorola and others, are also designed to replace Application Specific Integrated Circuits (Asics).
A lot of network equipment companies tend to develop their own Asics for packet-processing functions in their own equipment, but these proprietary parts are costly and difficult to design, according to Intel.
"Asics are very, very difficult to develop," explained Sean Maloney, executive vice president and general manager at Intel's Communications Group. He told vnunet.com that Intel is "trying to replace Asics".
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