Intel and Micron have begun delivery of their next-generation 25nm NAND memory chips which use triple-level cell storage technology for maximum efficiency.
The first 8GB and 64GB chips are being shipped to selected customers for incorporation into SD card memory devices, and full production will be in place by Christmas, according to the IM Flash Technologies (IMFT) joint venture.
The chips can store three bits of information per cell, rather than the traditional one or two, and Intel claims that they are the most efficient on the market.
"With January's introduction of the industry's smallest die size at 25nm, quickly followed by the move to three-bit-per-cell on 25nm, we continue to gain momentum and offer customers a compelling set of leading products," said Tom Rampone, Intel vice president and general manager of Intel's NAND Solutions Group.
"Intel plans to use the design and manufacturing leadership of IMFT to deliver higher-density cost-competitive products to our customers based on the new 8GB 25nm NAND device."
IMFT is competing with Samsung and others for a bigger stake in the increasingly lucrative NAND market. With the removable storage market growing, and solid state hard drives drawing more interest, chip companies are fighting to get the best hardware on to the market.
"As the role of NAND memory continues to escalate in consumer electronics products, we see the early transition to triple-level cell on 25nm as a competitive edge in our growing portfolio of NAND memory products," said Brian Shirley, vice president of Micron's NAND Solutions Group.
"We are already working to qualify the 8GB triple-level cell NAND Flash device within end-product designs, including higher capacity products."
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