Intel downplayed its Merced 64bit processor at the Microprocessor Forum in this week and instead emphasised its successor, McKinley, and a new high-performance 32-bit CPU, codenamed Foster.
The Foster chip is based on a new 32-bit processor core and will match the performance of Merced, Intel claims.
At the conference in San Jose, Intel outlined its four year processor roadmap, focussing on the high-end of the market and attempting to shed light on how 32-bit and 64-bit processors will co-exist in the workstation and server markets.
But the chip giant made it clear that its 64-bit chips will not significantly outperform their 32-bit cousins until the second-generation McKinley chip emerges in late 2001.
Almost all of Intel existing product line is based on the P6 core, which powers the Pentium II and Celeron processors, and the current highest-end chip, the Pentium II Xeon.
The Xeon will be succeeded by Tanner in the first half of ?99, but will use the same Slot 2 bus design as its predecessor and support Katmai New Instructions (KNI) to boost three dimensional (3D) performance and multimedia capabilities.
Cascades will follow Tanner in late 1999 or early 2000, and will be based on .18 micron technology and sport an on-chip level 2 cache.
By late 2000 or early 2001, Foster will succeed Cascades and be based on a new processor core, optimised for .18 micron technology. It will be optimised for x86 code and offer relatively good price/performance.
The offering will have large, on-chip level 1 and 2 caches and is expected to start at clock speeds of 1 GHz. It is scheduled to ship shortly after Merced, but before McKinley and is promised to provide the IA-32 family with a major performance leap, making it directly equivalent in power to Merced.
Despite repeated delays, Merced is now due to ship in mid 2000, Steve Smith, corporate vice president of Intel?s microprocessor products group, confirmed.
He says that the chip will be optimised for floating-point (FP) performance, and will execute up to eight single precision FP operations in one clock cycle.
He also claims it will process multimedia applications 20 times faster than the Pentium Pro and about three times as fast as next year?s Tanner processor.
For code that runs comfortably in 32-bit mode, Foster will be the processor of choice, he continues, while Merced will targetted at 64bit applications and multiprocessing systems. ?It?s a workload choice?, he adds.
But Intel is now positioning McKinley as the first chip to truly deliver on the promises of Intel and Hewlett-Packard?s EPIC (Explicitly Parallel Instruction Computing) design.
This is due in late 2001 and Intel claims it will execute 1-64 binaries twice as fast as Merced, include on-chip level 2 cache and start at clock speeds of 1 GHz. McKinley will also provide three times the bus speeds of Merced.
But there is a catch. It now emerges that users will not only need to recompile their applications to take advantage of Merced's new functionality, but they will also need to recompile them for McKinley.
This revelation only adds to current industry debate as to whether the EPIC architecture can deliver on its promise because it relies heavily on its compiler to discover parallelisms in application code.
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