HP today claimed to have developed a "groundbreaking design" for designing
next-generation nano-electronic circuits that can deliver near-perfect
manufacturing yields with equipment 1,000 times less expensive than currently
available.
Researchers from the firm explained that the technique centres on the use of
coding theory, an approach
currently being used in existing mathematical, cryptographic and telecoms
applications.
HP Labs authors Phil Kuekes, Warren
Robinett, Gadiel Seroussi and Stan Williams explained that the new
defect-tolerant design refines HP's patented
crossbar
nano-chip architecture.
Williams believes that future chips will have to rely, at least in part, on
the crossbar architecture, in which a set of parallel nano-scale wires are laid
on top of another set of parallel wires at an approximate 90-degree angle,
sandwiching a layer of electrically switchable material.
Where the material becomes trapped between the crossing wires, it can form a
switch that represents a '1' or '0', the basic building blocks of computer code.
"We have invented a completely new way of designing an electronic
interconnect for nano-scale circuits using coding theory which is commonly used
in today's digital cell phone systems and deep-space probes," said Williams, HP
senior fellow and director of quantum science research at HP Labs.
"By using a cross-bar architecture and adding 50 per cent more wires as an
'insurance policy' we believe it will be possible to fabricate nano-electronic
circuits with nearly perfect yields even though the probability of broken
components will be high."
According to the researchers, future chips may be limited in the geometric
complexity that can be created at the nano level because of
problems with precision alignment.
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