14 Jul 2011
Delegates at SEMICON West have been told that current processor technologies are good enough to scale up performance for at least another decade.
Luc Van den Hove, president of nanoelectronics research firm IMEC, used his keynote to outline the advances in semiconductors that will come onstream over the next decade.
He predicted that these systems will give the industry the technology and the roadmap to maintain Moore's Law levels of performance increases and price reductions.
"For decades we hadn't changed the materials in semiconductors and kept the design concept pretty much the same," he said.
"That came to an end 10 years ago, when it became impossible to further scale down. But in the last 10 years we've used materials and 3D building technology to bring innovation to the semiconductor and keep growth going."
The scaling down of today's High-K metal gate technology still produces unacceptable leakage levels, he explained, but tri-gate technology announced by Intel in May could take up the slack and would be scalable all the way down to 10nm.
Beyond that level, tunnel field-effect transistors are looking very promising, but more work needs to be done.
On the memory side, flash has a solid roadmap scaling down to 11nm by 2020, and DRAM technology will go down to 16nm to 20nm in the same time, Van den Hove predicted.
Scaling down in size is a limited option, however, and the industry is looking at new materials such as germanium to extend the power of semiconductor technology. In addition, stacking components is enabling greater chip densities, although this too is a finite process.
On the networking side, silicon photonics is close to the mass market, with the ability to build all the components needed to build optical connections directly to silicon now sorted out. Such systems could dramatically increase wired data rates, Van den Hove said.
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