02 Dec 2010
Micron is building error controller and memory management chips into its next generation of Nand memory systems.
The ClearNAND system is designed to control the levels of error in transfer and read/write on increasingly large solid state systems.
As transistor sizes fall to the 20nm level and below, error correction is becoming almost as important as raw storage, Kevin Kilbuck, director of strategic marketing at Micron's Nand product group, told V3.co.uk.
"Today's product has a modest amount of error code correction, but if we look several generations ahead we're going to need a tremendous amount more horsepower in this error correction controller that's packaged with the Nand die," he said.
Micron is stacking up to eight Nand layers with an embedded controller chip which will come in two forms: Standard ClearNAND for sub-32GB consumer devices; and Enhanced ClearNAND for 16GB to 64GB systems aimed at enterprise and general computing.
Kilbuck explained that raw Nand is suitable for simple devices with low data traffic, such as USB drives, but that the market will be dominated by error code correction-managed memory by 2014.
ClearNAND is the first stage in the process, and increasingly powerful error code correction units will be needed once the technology behind the transistors reaches smaller levels.
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