IBM outlines Power4 chip

IBM has announced details of future generations of Power4, the processor architecture for its rebranded range of mid-range eServers and workstations.

The Power4's core processor technology features a superscalar design, pipeline and structure for high frequencies, and is binary compatible with prior designs.

"We believe Power4 signals a new era in server design and engages a strong focus on the system level," said Charles Moore, the distinguished engineer at IBM's server group, speaking at this week's Microprocessor Forum in Silicon Valley.

The Power4, scheduled for release early next year, includes instruction-level parallelism, and speculative superscalar organisation with out-of-order execution and aggressive branch prediction. The chip also includes two processors, a cache and an input/output controller.

Linley Gwennap, an analyst at the Linley Group, said the processor could help IBM outgun Sun Microsystems, its most direct competitor in the server business.

"Sun has thrived by concentrating on high-memory bandwidth and robust multiprocessor systems," he said, adding that "it is difficult to imagine anyone creating a system with much higher bandwidth than Power4".

IBM also outlined its S/390 64bit microprocessor this week. The processor, codenamed Blue Flame, focuses on reliability, availability and serviceability, said IBM officials.

It will be used in the zSeries 900 mainframe to provide users with 64bit addressing. The server will also be able to execute 21bit, 32bit and 64bit applications concurrently.