Start-up shows off bus-less 64-core processor

Start-up chip firm Tilera is scheduled to release a low power, high performance 64-core processor later today.

Tilera claims that its new TILE64 processor can out-perform Intel's Xeon by 1,000 per cent on some workloads, while consuming only one third of the power.

Scheduled to be unveiled at the Hot Chips conference at Stanford University in Silicon Valley, the processor targets embedded applications in communications devices and switches as well as appliances for encoding high-definition video streams.

Tilera claimed that the chip will allow the Snort network security application to scan 10Gb of data traffic for malware and other suspicious activity in the same time that an Intel Xeon chip could scan 1Gb.

The chip is also aiming for the digital signal processing space, where it could be used to encode high-definition video streams at a much faster speed than current technologies.

Tilera claimed that its chip performs 40 times faster than the leading Motorola chip in the space, the TMS320DM648.

The start-up will start shipping a 600MHz model at $435, comparable to the cost of a mid-range Intel quad-core Xeon.

Tilera will also ship a 1GHz model. A 32-core chip is scheduled for release by the middle of next year and a 120-core version late next year.

The secret to the processor lies in its mesh interconnect, a new way to connect multiple cores on the chip.

Bob Doud, director of marketing at Tilera, claimed that the architecture will allow the "next decade of processor and multi-core development".

"It allows us to come out with 64 cores which nobody else has done. And we are able to scale up to hundreds and even thousands of cores without radically re-architecting this basic design," Doud told vnunet.com.

Nathan Brookwood, an analyst with Insight64, acknowledged that the chip's design is one of its strong points.

"The architecture is going to lend itself to scalability in a way that most other multi-core designs that I have seen so far do not," Brookwood told vnunet.com.

Processors hit a bottleneck as they gain cores, because data has to be transported from the processing cores to controllers that are typically placed outside the core, such as network controllers, cache memory and the system's main memory.

Intel, for instance, uses a front side bus to pump this information around. But as the company increases the core count on its processors, it also has to speed up the front side bus, which increases overall power consumption.

Tilera has moved all the controllers from the chipset to the processor, lining them up around the processor cores. Each processor core has a switch that routes the information between cores and the controllers.