Intel opens door for application accelerators

Intel has unveiled a 'competitive response' to AMD's Torenza

Intel is to offer two new ways for third-party hardware vendors to plug into its processors, which could enable a new market of application accelerators. 

Pat Gelsinger, senior vice president at Intel's Digital Enterprise Group, told delegates at Intel Developer Forum that the firm has allowed Xilinx and Altera to create so-called Field Programmable Gate Arrays (FPGAs) that connect directly to a processor's front side bus. 

An FPGA chip is designed to perform one specific task, for instance to speed up floating point calculations. Having direct access to the front side bus is expected to boost these devices' performance.

The announcement is a direct response to the support that AMD has been building for its Torenza open socket design that allows third-party vendors to create co-processors that have access to the same resources as the CPU. 

AMD claimed last week that its standard had attracted interest from enterprise systems vendors including IBM, Sun Microsystems, Dell and HP. 

Roger Kay, founder of analyst firm Endpoint Technologies, said that Intel's move is mostly a "competitive response" to AMD's Torenza, as illustrated by the fact that only two hardware vendors are allowed access. 

"Intel considers the front side bus licence as a competitive weapon. It wants to control who gets to use that," Kay told vnunet.com. 

The analyst warned, however, that there is no proven market for application accelerators. "Until providers demonstrate these capabilities, the buyers aren't going to be calling for it," he said.

In a related announcement, Intel and IBM have unveiled a new interconnect standard codenamed Geneseo.

The standard is an enhancement of the existing PCI express standard used for storage and networking devices and graphics cards.

"This enhancement is pivotal to embracing the next generation of application acceleration," said Gelsinger.

Similar to the FPGAs, the standard will enable application-specific accelerators.

Intel touted XML messaging, encryption and decryption and compute-intensive applications such as financial and geographic modelling as potential problems for the technologies to target.

The standard has been embraced by a series of technology providers including HP, Dell, EMC and Sun Microsystems.

Products based on Geneseo are expected to become available some time in 2008.

• A video presentation of the Geneseo interconnect technology is available on the Silicon Valley Sleuth blog.